1. Field of the Invention
The present invention relates to a spacer structure, and more specifically, to a spacer structure with a carbon-containing oxide film.
2. Description of the Prior Art
Metal oxide semiconductor (MOS) transistors are in wide use in many electric devices. A MOS transistor has four terminals: the source, the drain, the gate electrode, and the substrate. When a gate voltage greater than a threshold voltage of a MOS transistor is applied to the gate electrode, a channel forms between the source and the drain due to strong inversion. Consequently, the electrical performance of the gate electrode is an important issue in the semiconductor industry. For providing a good electrical performance of the gate electrode, a spacer positioned on the gate sidewall is typically used so that the source and drain or other electric elements can be effectively isolated from the gate electrode.
FIGS. 1-4 are schematic sectional views of fabricating the spacer structure of a MOS transistor according to the prior art. With reference to FIG. 1, a silicon substrate 10 is provided, wherein a gate electrode 12 and a gate insulation film 14 are formed on the surface of the substrate 10. For forming the spacer structure, a first oxide film 16 is formed on the substrate 10 and covering the gate electrode 12, wherein the first oxide film 16 may be a high temperature oxide (HTO) film. Then, a nitride film 18 is deposited on the first oxide film 16, wherein a furnace system is used for introducing bis(tertiarybutylamine)silane (BTBAS) as a precursor to form the nitride film 18.
Referring to FIG. 2, a second oxide film 20 is deposited on the substrate 10, covering the nitride film 18. The second oxide film 20 is typically formed by a chemical vapor deposition (CVD) process or a plasma enhanced chemical vapor deposition (PECVD) process, wherein tetra-ethyl-ortho-silicate (TEOS) is used as the reactant gas to form the second oxide film 20.
With reference to FIG. 3, an etching back process is performed after forming the second oxide film 20 for fabricating a spacer structure of a MOS transistor. Sequentially, an L-shaped spacer 22 and an arc-shaped spacer 24 are formed at the gate sidewall 12a. However, a silicon oxide film has a much higher etching rate than that of a silicon nitride film. For example, the first oxide film 16 which is a HTO film has an etching rate reach to 183.8 angstrom (Å) per minute, thus the second oxide film 20 and the first oxide film 16 are easily over removed which will result in defects to the MOS transistor. As shown in FIG. 4, oxide loss occurs in the arc-shaped spacer 24, and the first oxide film 16 also has an undercut at the side of the L-shaped spacer 22. As a result, it is hard to control the spacer structure of the MOS transistor according to the fabrication of the prior art, which impacts the implant shape of the following formed source and drain structure of the MOS transistor. Therefore, the unexpected oxide loss of the spacer structure may seriously influence the electric performance of the MOS transistor. Accordingly, how to provide low etch-rate oxide films during fabricating a spacer of a MOS transistor is still an important issue to the manufacturer.